1. Technical Field
The present disclosure relates to a timing analysis technology. More particularly, the present disclosure relates to a device and a method for performing timing analysis used in a programmable logic array system.
2. Description of Related Art
In automatic test equipment (ATE) systems, the measurement of the timing is important. The common targets of the timing measurement include the pulse width, the rise time, the fall time, the frequency and skew of the waveform of signals of an under-test module. When the signals of the under-test module are not outputted correctly, a calibration can be made according to the measured timing information such that the function of the under-test module is not affected by the incorrect timing of the signals.
In the conventional timing measurement technology, delay elements connected in series are used to delay the signal such that an analyzing module perform the timing measurement according to the delay result of these delay elements. When the device such as the programmable logic array is used to implement the timing measurement system, the routing area becomes too large when lots of delay elements are used. When the delayed signals generated from the delay elements are sent to the analyzing module, there are lots of issues that may decrease the accuracy of the measurement result due to the large routing area. For example, the distances from each of the delay elements to the analyzing module large routing area are not the same. Further, the routings of different channels are different as well.
On the other hand, in parts of the conventional technologies, the signals are sampled by high speed I/O interface of the logic programmable array. Though the accuracy of the measurement result is high, the number of the channels is limited. For most of the ATE systems, it is necessary to be equipped with lots of signal input channels to perform the timing measurement efficiently.
Accordingly, what is needed is a device and a method for performing timing analysis used in a programmable logic array system to avoid the error generated due to the large routing area and increase the accuracy of the measurement result.